Mem-elements based Neuromorphic Hardware for Neural Network Application

Fig 1.1 Memory and non-memory components relationship Fig 1.2 Concept of artificial neural system in neuromorphic devices Fig 2.1 Memristor Symbol Fig 2.2 Current-voltage pinched hysteresis curve of memristor Fig 2.3 Memcapacitor Symbol Fig 2.4 Charge-voltage pinched hysteresis curve of memcapacitor Fig 2.5 Meminductor Symbol Fig 2.6 Current-flux pinched hysteresis curve of meminductor Fig 3.1 Device structure (a) TiOx-based memristor device (b) Si-based memcapacitor device Fig 3.2 Distribution of the TiOx memristor conductance in the HRS and LRS Fig 3.3 Training accuracy comparison of non-idealities (a) different device-todevice memductance variation (b) different cycle-to-cycle variation. Fig 3.4 The accuracy is influenced by the line resistance and the sneak paths Fig 3.5 Transistor level used in the framework (a) current sense amplifier (CSA), (b) voltage sense amplifier (VSA), (c) level shifter, and (d) successive approximation register (SAR) ADC. Fig 4.1 OTA (a) Symbol representation, and (b) MOSFETs realization Fig 4.2 Proposed meminductor emulator circuit Fig 4.3 An RLC neuromorphic circuit using meminductor for amoeba behavior Fig 4.4 Neuromorphic circuit using a meminductor for amoeba behavior Fig 4.5 Photograph of experimental setup Fig 4.6 Schematic of the hardware-implemented convolution layer Fig 4.7 Flowchart of CNN model training Fig 4.8 Structure of CNN implemented in software for classification of MNIST dataset Fig 4.9 Proposed meminductor based (a) VMM accelerator.