Classification-Based Automatic HDL Code Generation Using LLMs

--While large language models (LLMs) have demonstrated the ability to generate hardware description language (HDL) code for digital circuits, they still suffer from the hallucination problem, which leads to the generation of incorrect HDL code or misunderstanding of specifications. In this work, we introduce a human-expert-inspired method to mitigate the hallucination of LLMs and improve the performance in HDL code generation. We first let LLMs classify the type of the circuit based on the specifications. Then, according to the type of the circuit, we split the tasks into several sub-procedures, including information extraction and human-like design flow using Electronic Design Automation (EDA) tools. Besides, we also use a search method to mitigate the variation in code generation. Experimental results show that our method can significantly improve the functional correctness of the generated V erilog and reduce the hallucination of LLMs. As Moore's Law slowing down, there is an increasing demand for customized VLSI design. One of the key steps in the hardware design process is writing the hardware description language (HDL) code. However, HDL programming is time-consuming and labor-intensive. Therefore, the automatic HDL code generation from the specifications in natural language has attracted much attention in recent years. Among the automatic HDL code generation solutions, large language models (LLMs) code generation is one of the most promising solutions. LLMs have achieved remarkable success in various fields, such as machine translation [1] and robot trajectory planning [2]. In software design, LLMs have also demonstrated the ability to generate the code for various programming languages [3]. In the field of hardware design, generative models have been employed to create designs [4].