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LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing Supplementary Materials

Neural Information Processing Systems

It also incorporates Python programs that can train and test the models mentioned in this paper. By inheriting the classes, users can easily build their own models that can be trained and tested by LithoBench, without the need of writing the code for data loading and evaluation. For average pooling, we use a kernel size of 7 and a stride of 1. PyTorch builtin functions so that an SGD optimizer with a learning rate of 0.5 can be used to optimize Table 1 compares the performance of our reference IL T algorithm with SOT A IL T algorithms. We provide the PNG images of the all data. The connections between adjacent vertices are horizontal or vertical. In this section, we describe the details of the DNN models used in this paper.



LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing

Neural Information Processing Systems

Computational lithography provides algorithmic and mathematical support for resolution enhancement in optical lithography, which is the critical step in semiconductor manufacturing. The time-consuming lithography simulation and mask optimization processes limit the practical application of inverse lithography technology (ILT), a promising solution to the challenges of advanced-node lithography. Although various machine learning methods for ILT have shown promise for reducing the computational burden, this field is in lack of a dataset that can train the models thoroughly and evaluate the performance comprehensively. To boost the development of AI-driven computational lithography, we present the LithoBench dataset, a collection of circuit layout tiles for deep-learning-based lithography simulation and mask optimization. LithoBench consists of more than 120k tiles that are cropped from real circuit designs or synthesized according to the layout topologies of famous ILT testcases. The ground truths are generated by a famous lithography model in academia and an advanced ILT method. Based on the data, we provide a framework to design and evaluate deep neural networks (DNNs) with the data. The framework is used to benchmark state-of-the-art models on lithography simulation and mask optimization. We hope LithoBench can promote the research and development of computational lithography.


LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing Supplementary Materials

Neural Information Processing Systems

It also incorporates Python programs that can train and test the models mentioned in this paper. By inheriting the classes, users can easily build their own models that can be trained and tested by LithoBench, without the need of writing the code for data loading and evaluation. For average pooling, we use a kernel size of 7 and a stride of 1. PyTorch builtin functions so that an SGD optimizer with a learning rate of 0.5 can be used to optimize Table 1 compares the performance of our reference IL T algorithm with SOT A IL T algorithms. We provide the PNG images of the all data. The connections between adjacent vertices are horizontal or vertical. In this section, we describe the details of the DNN models used in this paper.



LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing

Neural Information Processing Systems

Computational lithography provides algorithmic and mathematical support for resolution enhancement in optical lithography, which is the critical step in semiconductor manufacturing. The time-consuming lithography simulation and mask optimization processes limit the practical application of inverse lithography technology (ILT), a promising solution to the challenges of advanced-node lithography. Although various machine learning methods for ILT have shown promise for reducing the computational burden, this field is in lack of a dataset that can train the models thoroughly and evaluate the performance comprehensively. To boost the development of AI-driven computational lithography, we present the LithoBench dataset, a collection of circuit layout tiles for deep-learning-based lithography simulation and mask optimization. LithoBench consists of more than 120k tiles that are cropped from real circuit designs or synthesized according to the layout topologies of famous ILT testcases.