Wafer Quality Inspection using Memristive LSTM, ANN, DNN and HTM

Abstract--The automated wafer inspection and quality control is complex and time consuming task, which can be speed up using neuromorphic memristive architectures, as a separate inspection device or integrating directly into sensors. This paper presents the performance analysis and comparison of different neuromorphic architectures for patterned wafer quality inspection and classification. The application of nonvolatile memristive devices in these architectures ensures low power consumption, small on-chip area scalability. We demonstrate that Long-Short Term Memory (LSTM) outperforms other architectures for the same number of training iterations, and has relatively low on-chip area and power consumption. I. INTRODUCTION With the increase of density and complexity of semiconductor devices on the wafer, wafer surface inspection becomes increasingly complex, important, and time consuming task.