POLARON: Precision-aware On-device Learning and Adaptive Runtime-cONfigurable AI acceleration
Lokhande, Mukul, Vishvakarma, Santosh Kumar
–arXiv.org Artificial Intelligence
--The increasing complexity of AI models requires flexible hardware capable of supporting diverse precision formats, particularly for energy-constrained edge platforms. This work presents PARV-CE, a SIMD-enabled, multi-precision MAC engine that performs efficient multiply-accumulate operations using a unified data-path for 4/8/16-bit fixed-point, floating-point, and posit formats. The architecture incorporates a layer-adaptive precision strategy to align computational accuracy with workload sensitivity, optimizing both performance and energy usage. The results demonstrate up to 2 improvement in PDP and 3 reduction in resource usage compared to SoT A designs, while retaining accuracy within 1.8% FP32 baseline. The architecture supports both on-device training and inference across a range of workloads, including DNNs, RNNs, RL, and Transformer models. The empirical analysis establish PARV-CE incorporated POLARON as a scalable and energy-efficient solution for precision-adaptive AI acceleration at edge.
arXiv.org Artificial Intelligence
Jun-11-2025
- Country:
- Asia > India (0.14)
- North America > United States (0.04)
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- Research Report (0.70)
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- Information Technology (0.68)
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