Large language models (LLMs) are rapidly pushing the limits of contemporary computing hardware. For example, training GPT-3 has been estimated to consume around 1300 MWh of electricity, and projections suggest future models may require city-scale (gigawatt) power budgets. These demands motivate exploration of computing paradigms beyond conventional von Neumann architectures. This review surveys emerging photonic hardware optimized for next-generation generative AI computing. We discuss integrated photonic neural network architectures (e.g., Mach-Zehnder interferometer meshes, lasers, wavelength-multiplexed microring resonators) that perform ultrafast matrix operations. We also examine promising alternative neuromorphic devices, including spiking neural network circuits and hybrid spintronic-photonic synapses, which combine memory and processing. The integration of two-dimensional materials (graphene, TMDCs) into silicon photonic platforms is reviewed for tunable modulators and on-chip synaptic elements. Transformer-based LLM architectures (self-attention and feed-forward layers) are analyzed in this context, identifying strategies and challenges for mapping dynamic matrix multiplications onto these novel hardware substrates. We then dissect the mechanisms of mainstream LLMs, such as ChatGPT, DeepSeek, and LLaMA, highlighting their architectural similarities and differences. We synthesize state-of-the-art components, algorithms, and integration methods, highlighting key advances and open issues in scaling such systems to mega-sized LLM models. We find that photonic computing systems could potentially surpass electronic processors by orders of magnitude in throughput and energy efficiency, but require breakthroughs in memory, especially for long-context windows and long token sequences, and in storage of ultra-large datasets.

Physics-informed neural networks (PINNs) have shown promise in solving partial differential equations (PDEs), with growing interest in their energy-efficient, real-time training on edge devices. Photonic computing offers a potential solution to achieve this goal because of its ultra-high operation speed. However, the lack of photonic memory and the large device sizes prevent training real-size PINNs on photonic chips. This paper proposes a completely back-propagation-free (BP-free) and highly salable framework for training real-size PINNs on silicon photonic platforms. Our approach involves three key innovations: (1) a sparse-grid Stein derivative estimator to avoid the BP in the loss evaluation of a PINN, (2) a dimension-reduced zeroth-order optimization via tensor-train decomposition to achieve better scalability and convergence in BP-free training, and (3) a scalable on-chip photonic PINN training accelerator design using photonic tensor cores. We validate our numerical methods on both low- and high-dimensional PDE benchmarks. Through circuit simulation based on real device parameters, we further demonstrate the significant performance benefit (e.g., real-time training, huge chip area reduction) of our photonic accelerator.

Photonic integrated circuits are finding use in a variety of applications including optical transceivers, LIDAR, bio-sensing, photonic quantum computing, and Machine Learning (ML). In particular, with the exponentially increasing sizes of ML models, photonics-based accelerators are getting special attention as a sustainable solution because they can perform ML inferences with multiple orders of magnitude higher energy efficiency than CMOS-based accelerators. However, recent studies have shown that hardware manufacturing and infrastructure contribute significantly to the carbon footprint of computing devices, even surpassing the emissions generated during their use. For example, the manufacturing process accounts for 74% of the total carbon emissions from Apple in 2019. This prompts us to ask -- if we consider both the embodied (manufacturing) and operational carbon cost of photonics, is it indeed a viable avenue for a sustainable future? So, in this paper, we build a carbon footprint model for photonic chips and investigate the sustainability of photonics-based accelerators by conducting a case study on ADEPT, a photonics-based accelerator for deep neural network inference. Our analysis shows that photonics can reduce both operational and embodied carbon footprints with its high energy efficiency and at least 4$\times$ less fabrication carbon cost per unit area than 28 nm CMOS.

Quantum Generative Adversarial Networks (QGANs), an intersection of quantum computing and machine learning, have attracted widespread attention due to their potential advantages over classical analogs. However, in the current era of Noisy Intermediate-Scale Quantum (NISQ) computing, it is essential to investigate whether QGANs can perform learning tasks on near-term quantum devices usually affected by noise and even defects. In this Letter, using a programmable silicon quantum photonic chip, we experimentally demonstrate the QGAN model in photonics for the first time, and investigate the effects of noise and defects on its performance. Our results show that QGANs can generate high-quality quantum data with a fidelity higher than 90\%, even under conditions where up to half of the generator's phase shifters are damaged, or all of the generator and discriminator's phase shifters are subjected to phase noise up to 0.04$\pi$. Our work sheds light on the feasibility of implementing QGANs on NISQ-era quantum hardware.

In the modern financial industry system, the structure of products has become more and more complex, and the bottleneck constraint of classical computing power has already restricted the development of the financial industry. Here, we present a photonic chip that implements the unary approach to European option pricing, in combination with the quantum amplitude estimation algorithm, to achieve a quadratic speedup compared to classical Monte Carlo methods. The circuit consists of three modules: a module loading the distribution of asset prices, a module computing the expected payoff, and a module performing the quantum amplitude estimation algorithm to introduce speed-ups. In the distribution module, a generative adversarial network is embedded for efficient learning and loading of asset distributions, which precisely capture the market trends. This work is a step forward in the development of specialized photonic processors for applications in finance, with the potential to improve the efficiency and quality of financial services.

Research led by Monash University, RMIT and the University of Adelaide has developed an accurate method of controlling optical circuits on fingernail-sized photonic integrated circuits. The development, published in the prestigious international journal Optica builds on the work by the same team who recently created the world's first self-calibrated photonic chip. Photonics, or the use of light particles to store and transmit information, is a burgeoning field, supporting our need to create faster, better, more efficient and more sustainable technology. Programmable photonic integrated circuits (PICs), offer diverse signal processing functions within a single chip, and present promising solutions for applications ranging from optical communications to artificial intelligence. Whether it's downloading movies or keeping a satellite on course, photonics is radically changing the way we live, revolutionising the processing capability of large scale equipment onto a chip the size of a human fingernail.

A multi-institution research team has developed an optical chip that can train machine learning hardware. Their research is published today in Optica. Machine learning applications have skyrocketed to $165 billion annually, according to a recent report from McKinsey. But before a machine can perform intelligence tasks such as recognizing the details of an image, it must be trained. Training of modern-day artificial intelligence (AI) systems like Tesla's autopilot costs several million dollars in electric power consumption and requires supercomputer-like infrastructure. This surging AI "appetite" leaves an ever-widening gap between computer hardware and demand for AI.

An optical chip has been developed by a multi-institution research group that has the potential to train machine learning hardware. A picture of the chip used for this work. On a yearly basis, machine learning applications skyrocketed to $165B, per a recent McKinsey report. Training for modern-day artificial intelligence (AI) systems similar to Tesla's autopilot costs millions of dollars in electrical power consumption and needs supercomputer-like infrastructure. An ever-widening gap between demand for AI and computer hardware is left by this surging AI "appetite." Photonic integrated circuits, or optical chips, have evolved as a possible solution to provide greater computing performance, as quantified by the operations executed per second per watt utilized (TOPS/W).

Distinguishing letters is usually easy for the human brain. The lines on p and d are flipped, for example, and the curves in an a and the cross of a t are dead giveaways. As we read text on a page, neurons in our brain fire, propelling sensory input through complex networks that allow us to interpret and categorize the letters. Computer chips, particularly graphics processing units (GPUs), can achieve the same task with neural networks of their own. When used for applications such as facial recognition, GPUs transform the impinging optical information into electrical signals.

As AI models become more computationally demanding, engineers are looking to new types of materials and hardware to speed up the model development process. One category of components with promise is photonic chips, which leverage light to send signals as opposed to the electricity that conventional processors use. In theory, photonic chips could lead to higher performance because light produces less heat than electricity, can travel faster, and is less susceptible to changes in temperature and electromagnetic fields. But photonic chips have drawbacks that must be addressed if the technology is to reach the mainstream. Moreover, photonic architectures still largely rely on electronic control circuits, which can create bottlenecks.