Achronix Pushes FPGAs to the Max

Recently, Achronix Semiconductor, a provider of FPGA-based hardware accelerator devices, introduced its Speedster7t family, aimed at the demands of artificial intelligence (AI), machine learning (ML), and other high-bandwidth networking applications that can benefit from high levels of acceleration. The company claims that the devices are based on a new, highly optimized architecture. This latest FPGA architecture balances on-chip processing, interconnects and external I/O, to maximize data throughput. The Speedster7t family includes a two-dimensional network-on-chip (NoC), and a high-density array of machine-learning processors (MLPs). Hence, the NoC spans horizontally and vertically over the FPGA fabric, connecting to all of the FPGA's high-speed data and memory interfaces, supporting the high-bandwidth communication needed between on-chip processing engines.