Most forms of technology applications are well understood. Every computer programme can be deconstructed into the basic building blocks of code, and if it goes wrong, you can debug the software – often by simply stepping through the code line by line in order to find out where the problem lies. Artificial Intelligence, or AI, is different. With the latest AI large language models we can't predict exactly what it will output, but it will do a good job at writing an article or creating poetry. What makes them human-like is the lack of predictable outcomes – humans simply aren't predictable!

In terms of basic research, our current focus is the development, of broadly applicable techniques for description and matching of structure in sensory data. Such techniques appear to lmderlie virtually every aspect of early and intermediate vision, such as edge and region finding, perceptual organization and grouping, and the recovery of 3-D shape from contour, texture, stereo and motion They appear to be equally important in other sensory domains, such as audition (e g, for describing the structure in spectrograms.) In particular, we are dealing with the problem of grey-level inspection, and are constructing a vision workbench to allow rapid experimentation with alternative techniques Finally, WC are examining a variety of special-purpose architectures for image processing. These range from a SUN (MC68000-based) workstation, augment,cd with high-speed pipelined VLSI components, to a massively parallel architerture involving a thousand processors and a novel interconnection network. Knowledge Representation Contact: Ronald J. Brachman Having had experience with knowledge representation syst,ems designed to support "common sense" reasoning, we are developing and implementing a new framework for representation and reasoning in arcas requiring "expertise."

MIT Artificial Intelligence Laboratory The MIT AI Laboratory has a long tradition of research in most aspects of Artificial Intelligence. Currently, the major foci include computer vision, manipulation, learning, Englishlanguage understanding, VLSI design, expert engineering problem solving, commonsense reasoning, computer architecture, distributed problem solving, models of human memory, programmer apprentices, and human education. Understanding Visual Images Professor Berthold K. P. Horn and his students have studied intensively the image irradiance equation and its applications. The reflectance and albedo map representations have been introduced to make surface orientation, illumination geometry, and surface reflectivity explicit. Recent work has centered on modelling the effects of the atmosphere which distort intensity values and make classification of terrain and related computations using the albedo map inaccurate.

Amounts shown in italicized text are for items listed in currency other than U.S. dollars and are approximate conversions to U.S. dollars based upon Bloomberg's conversion rates. This page was last updated: Jul-09 16:15. Number of bids and bid amounts may be slightly out of date. See each listing for international shipping options and costs.

The Diffusion Network(DN) is a stochastic recurrent network which has been shown capable of modeling the distributions of continuous-valued, continuous-time paths. However, the dynamics of the DN are governed by stochastic differential equations, making the DN unfavourable for simulation in a digital computer. This paper presents the implementation of the DN in analogue Very Large Scale Integration, enabling the DN to be simulated in real time. Moreover, the log-domain representation is applied to the DN, allowing the supply voltage and thus the power consumption to be reduced without limiting the dynamic ranges for diffusion processes. A VLSI chip containing a DN with two stochastic units has been designed and fabricated. The design of component circuits will be described, so will the simulation of the full system be presented. The simulation results demonstrate that the DN in VLSI is able to regenerate various types of continuous paths in real-time.

This paper introduces the Field-Programmable Learning Array, a new paradigm for rapid prototyping of learning primitives and machinelearning algorithms in silicon. The FPLA is a mixed-signal counterpart to the all-digital Field-Programmable Gate Array in that it enables rapid prototyping of algorithms in hardware. Unlike the FPGA, the FPLA is targeted directly for machine learning by providing local, parallel, online analog learning using floating-gate MOS synapse transistors. We present a prototype FPLA chip comprising an array of reconfigurable computational blocks and local interconnect. We demonstrate the viability of this architecture by mapping several learning circuits onto the prototype chip.

This paper introduces the Field-Programmable Learning Array, a new paradigm for rapid prototyping of learning primitives and machinelearning algorithms in silicon. The FPLA is a mixed-signal counterpart to the all-digital Field-Programmable Gate Array in that it enables rapid prototyping of algorithms in hardware. Unlike the FPGA, the FPLA is targeted directly for machine learning by providing local, parallel, online analog learning using floating-gate MOS synapse transistors. We present a prototype FPLA chip comprising an array of reconfigurable computational blocks and local interconnect. We demonstrate the viability of this architecture by mapping several learning circuits onto the prototype chip.

This paper introduces the Field-Programmable Learning Array, a new paradigm for rapid prototyping of learning primitives and machinelearning algorithmsin silicon. The FPLA is a mixed-signal counterpart to the all-digital Field-Programmable Gate Array in that it enables rapid prototyping of algorithms in hardware. Unlike the FPGA, the FPLA is targeted directly for machine learning by providing local, parallel, online analoglearning using floating-gate MOS synapse transistors. We present a prototype FPLA chip comprising an array of reconfigurable computational blocks and local interconnect. We demonstrate the viability ofthis architecture by mapping several learning circuits onto the prototype chip.

The Fairchild Laboratory for Artificial Intelligence Research (FLAIR) was inaugurated in October, 1980, with the purposes of introduction AI Technology into Fairchild Camera and Instrument Corporation, and of broadening the AI base of its parent company, Schlumberger Ltd. The charter of the laboratory includes basic and applied research in all AI disciplines. Currently, we have significant efforts underway in several areas of computational perception, knowledge representation and reasoning, and AI-related architectures. We also engage in various tool-building activities to support our research program. The current computational environment includes several large mainframes dedicated to AI research, a number of high-performance personal scientific machines, and extensive graphics capabilities.