Steganography is the practice of encoding secret information into innocuous content in such a manner that an adversarial third party would not realize that there is hidden meaning. While this problem has classically been studied in security literature, recent advances in generative models have led to a shared interest among security and machine learning researchers in developing scalable steganography techniques. In this work, we show that a steganography procedure is perfectly secure under Cachin (1998)'s information-theoretic model of steganography if and only if it is induced by a coupling. Furthermore, we show that, among perfectly secure procedures, a procedure maximizes information throughput if and only if it is induced by a minimum entropy coupling. These insights yield what are, to the best of our knowledge, the first steganography algorithms to achieve perfect security guarantees for arbitrary covertext distributions. To provide empirical validation, we compare a minimum entropy coupling-based approach to three modern baselines--arithmetic coding, Meteor, and adaptive dynamic grouping-- using GPT-2, WaveRNN, and Image Transformer as communication channels. We find that the minimum entropy coupling-based approach achieves superior encoding efficiency, despite its stronger security constraints. In aggregate, these results suggest that it may be natural to view information-theoretic steganography through the lens of minimum entropy coupling. In steganography (Blum & Hopper, 2004; Cachin, 2004), the goal, informally speaking, is to encode a plaintext message into another form of content (called stegotext) such that it appears similar enough to innocuous content (called covertext) that an adversary would not realize that there is hidden meaning.

Machine learning algorithms are becoming very greedy in terms of computing resources.

Axelera AI, a Dutch AI semiconductor start-up, has emerged from stealth with £8.7 million in seed round funding. The funding was led by Axelera's incubator company, Bitfury, a security and infrastructure provider for the Bitcoin blockchain. Nanoelectronics R&D centre imec and venture capital Innovation Industries also participated in the seed round. Axelera is developing a chipset to accelerate AI and machine learning algorithms at the edge. The startup claims that its product will use minimal power consumption at a greatly reduced price compared to its competitors.

The historic Belgian city of Leuven is known for its centuries-old university and as the headquarters of brewing giant Anheuser-Busch InBev NV. Less so as the location of a semiconductor research organization that is now the center of both political and industry attention. The Interuniversity Microelectronics Center (IMEC) may be Belgium's best-kept secret, but it's in global demand for its work on the future of computer chips, with applications in areas from genome sequencing to autonomous driving. It's also increasingly in the sights of governments as chips become political weapons in the U.S.-China tech conflict. Crippling industry shortages during the pandemic have meanwhile set off a scramble for access to advanced research as the U.S., China, Japan and Europe all seek greater self-reliance in semiconductor production.

Imec and GlobalFoundries have demonstrated a processor-in-memory chip that can achieve energy efficiency up to 2900 TOPS/W, approximately two orders of magnitude above today's commercial processor-in-memory chips. The chip uses an established idea, analog computing, implemented in SRAM in GlobalFoundries' 22nm fully-depleted silicon-on-insulator (FD-SOI) process technology. Imec's analog in-memory compute (AiMC) will be available to GlobalFoundries customers as a feature that can be implemented on the company's 22FDX platform. Analog compute Analog compute, or processor-inmemory, is an established technique that is already used in commercial AI accelerator chips from startups Mythic, Syntiant, Gyrfalcon and others. Since a neural network model may have tens or hundreds of millions of weights, sending data back and forth between the memory and the processor is inefficient.

Arria NLG, a leading provider of Natural Language Generation (NLG) technology, announced the two companies have joined forces to help the world draw greater meaning from data, opening the doors to better solutions for many of the problems we face. Their collaboration augments BI dashboards with insights written in natural language, providing a new starting point for data analytics. Verizon Business announced they are entering into a collaboration to work together on 5G and edge computing innovation to help enable the future of Industry 4.0. The companies plan to collaborate on solutions combining the high speed and low latency of Verizon's 5G and Multi-access Edge Compute (MEC) capabilities, IoT devices and sensors at the edge, and IBM's expertise in AI, hybrid multicloud, edge computing, asset management and connected operations. The Red Flag Group, a global leader in providing data and research to the world's largest corporations on the health of their customers, partners, suppliers and distributors as it applies to bribery, corruption, money laundering, fraud, sanctions, ESG and other reputational risks has announced that two of their most popular research solutions, IntegraCheck and IntegraWatch, are now accessible as a plugin to the Salesforce CRM platform.

Imec and GLOBALFOUNDRIES announced a hardware demonstration of a new artificial intelligence chip. Based on imec's Analog in Memory Computing (AiMC) architecture utilizing GF's 22FDX solution, the new chip is optimized to perform deep neural network calculations on in-memory computing hardware in the analog domain. Achieving record-high energy efficiency up to 2,900 TOPS/W, the accelerator is a key enabler for inference-on-the-edge for low-power devices. Since the early days of the digital computer age, the processor has been separated from the memory. Operations performed using a large amount of data require a similarly large number of data elements to be retrieved from the memory storage.

Imec said at its annual event here that it is prototyping a deep-learning inference chip using single-bit precision. The research institute hopes to gather data over the next year on the effectiveness for client devices of the novel data type and architecture--either a processor-in-memory (PIM) or an analog memory fabric. The PIM architecture, explored by academics for decades, is gaining popularity for data-intensive machine-learning algorithms. Startup Mythic and IBM Research are designing two of the most prominent efforts in the field. Many academics are experimenting with 1- to 4-bit data types to trim the heavy memory requirements for deep learning.

Antwerp (Belgium) – May 16, 2017 – Today, at the imec technology forum (ITF2017), imec, the world-leading research and innovation hub in nano-electronics and digital technologies, demonstrated the world's first self-learning neuromorphic chip. The brain-inspired chip, based on OxRAM technology, has the capability of self-learning and has been demonstrated to have the ability to compose music. The human brain is a dream for computer scientists: it has a huge computing power while consuming only a few tens of Watts. Imec researchers are combining state-of-the-art hardware and software to design chips that feature these desirable characteristics of a self-learning system. Imec's ultimate goal is to design the process technology and building blocks to make artificial intelligence to be energy efficient so that that it can be integrated into sensors.

A chip made by researchers at IMEC in Belgium uses brain-inspired circuits to compose melodies. The prototype neuromorphic chip learns the rules of musical composition by detecting patterns in the songs it's exposed to. It then creates its own song in the same style. It's an early demo from a project to develop low-power, general purpose learning accelerators that could help tailor medical sensors to their wearers and enable personal electronics to learn their users' patterns of behavior. Today's connected devices don't have much smarts on board--instead they send data into the cloud for analysis by remote servers, where energy use and cooling costs are not at a premium, says Praveen Raghavan, who leads technology development for neuromorphic computation at IMEC.