Faced with a congressional mandate to test its GPS system for cyber vulnerabilities, the Air Force commissioned a digital replica of the satellites and then asked contractors to hack the system. The use of "digital twins" is expanding from modelling in conventional simulators to include testing of emerging technologies and systems, predicting engine performance, or training automated systems to fly a plane. With GPS, Booz Allen Hamilton built the SatSim twin for Lockheed Martin's Block IIR GPS satellite for the Air Force Space and Missile Systems Center (SMC), in El Segundo, Calif. "The satellite itself was on orbit," BAH Vice President Kevin Coggins told Air Force Magazine. "So we built this digital model … and then we went looking for vulnerabilities. We did [penetration] testing and we saw what we could discover."

It is available from PublicAffairs, an imprint of Perseus Books LLC, a subsidiary of Hachette Book Group Inc. Imagine flying over a major city at night -- say, Chicago or Paris or Beijing -- and it is completely dark below. It is just a void of light akin to nighttime in the middle of the ocean. Then imagine someone flips on the power grid, and you see today's web of human activity light up. Imagine further that someone flips the switch again, and you glimpse a future image of the city. Where you once thought there was nothing, there is a universe of action -- both present and future.

In this paper we describe the architecture, implementation and experimental results for an Intracardiac Electrogram (ICEG) classification and compression chip. The chip processes and vector-quantises 30 dimensional analogue vectors while consuming a maximum of 2.5 J-tW power for a heart rate of 60 beats per minute (1 vector per second) from a 3.3 V supply. This represents a significant advance on previous work which achieved ultra low power supervised morphology classification since the template matching scheme used in this chip enables unsupervised blind classification of abnonnal rhythms and the computational support for low bit rate data compression. The adaptive template matching scheme used is tolerant to amplitude variations, and inter-and intra-sample time shifts.

In this paper we describe the architecture, implementation and experimental results for an Intracardiac Electrogram (ICEG) classification and compression chip. The chip processes and vector-quantises 30 dimensional analogue vectors while consuming a maximum of 2.5 J-tW power for a heart rate of 60 beats per minute (1 vector per second) from a 3.3 V supply. This represents a significant advance on previous work which achieved ultra low power supervised morphology classification since the template matching scheme used in this chip enables unsupervised blind classification of abnonnal rhythms and the computational support for low bit rate data compression. The adaptive template matching scheme used is tolerant to amplitude variations, and inter-and intra-sample time shifts.

In this paper we describe the architecture, implementation and experimental resultsfor an Intracardiac Electrogram (ICEG) classification and compression chip. The chip processes and vector-quantises 30 dimensional analoguevectors while consuming a maximum of 2.5 J-tW power for a heart rate of 60 beats per minute (1 vector per second) from a 3.3 V supply. This represents a significant advance on previous work which achieved ultra low power supervised morphology classification since the template matching scheme used in this chip enables unsupervised blind classification of abnonnal rhythms and the computational support for low bit rate data compression. The adaptive template matching scheme used is tolerant to amplitude variations, and inter-and intra-sample time shifts.