The Center for Advanced Electronics through Machine Learning (CAEML), which has been funded as a Phase I IUCRC by the National Science Foundation …

The Center for Advanced Electronics through Machine Learning (CAEML) has been very active in the newly-established machine learning track at DesignCon, helping to present many quality papers from the hardware design community. Celebrating its third anniversary this year, CAEML has been at the forefront of machine learning and its applications in hardware and electronic design. Much of the center's research has direct applications in the area of hardware and device management through machine-learned inference – from proactive hardware failure predictions, to complex performance modeling through surrogate models, to high dimensional time series prediction for resource forecasting. This article will take a look at some of the results of this research and its applications for AI-defined, next-generation hardware platforms. There has been an explosive growth of Internet of Things (IoT) devices in recent years. Analysts at Gartner predict the IoT will produce about $2 trillion US in economic benefit in the next five to 10 years.

Vendors and researchers are making significant progress applying machine learning to the thorny issues of chip design, according to a panel at DesignCon here. The use of AI in EDA was a hot topic that drew a standing-room-only crowd to the panel and spawned several papers at the event. Over the past year, the Center for Advanced Electronics through Machine Learning (CAEML) has gained four new partners. The team of 13 industry members and three universities has expanded both the breadth and depth of its work. "Last year, we focused mainly on signal integrity and power integrity, but this year, we diversified our portfolio into system analysis, chip layout, and trusted platform design -- so the diversity of the research has made the most progress," said Christopher Cheng, a distinguished technologist at Hewlett-Packard Enterprise and a member of CAEML.

Tasked with squeezing billions of transistors onto fingernail-sized slabs of silicon, chip designers are asking whether machine learning can help. In the view of electronic design automation firms, machine learning tools could chisel rough edges off complex chips, improving productivity, optimizing trade-offs like power consumption and timing, and testing that chips are ready for manufacturing. Though chip design is still a creative process, engineers need tools that abstract the massive number of variables in modern chips. Using statistics, the software generates models fitted to simulations that replicate how physical chips will work. The tools would seem to be prime candidates for machine learning, which can be trained to find hidden insights in data without explicit programming.