Goto

Collaborating Authors

 McCartor, Hal

Back Propagation Implementation on the Adaptive Solutions CNAPS Neurocomputer Chip

Neural Information Processing Systems

Most investigators have created large parallel computers or special purpose chips limited to a small subset of algorithms. The Adaptive Solutions CNAPS architecture describes a general-purpose 64-processor chip which supports on chip learning and is capable of implementing most current algorithms. Implementation of the popular Back Propagation (BP) algorithm will demonstrate the speed and versatility of this new chip.

Back Propagation Implementation on the Adaptive Solutions CNAPS Neurocomputer Chip

Neural Information Processing Systems

An 8 chip configuration can train 2.3 billion connections per second and evaluate 9.6 billion BP feed forward connections per second.