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Collaborating Authors

 LaFranchise, Jeffrey R.


CCD Neural Network Processors for Pattern Recognition

Neural Information Processing Systems

A CCD-based processor that we call the NNC2 is presented. The NNC2 implements a fully connected 192-input, 32-output two-layer network and can be cascaded to form multilayer networks or used in parallel for additional input or output nodes. The device computes 1.92 x 10


CCD Neural Network Processors for Pattern Recognition

Neural Information Processing Systems

A CCD-based processor that we call the NNC2 is presented. The NNC2 implements a fully connected 192-input, 32-output two-layer network and can be cascaded to form multilayer networks or used in parallel for additional inputor output nodes. The device computes 1.92 x 10


CCD Neural Network Processors for Pattern Recognition

Neural Information Processing Systems

A CCD-based processor that we call the NNC2 is presented. The NNC2 implements a fully connected 192-input, 32-output two-layer network and can be cascaded to form multilayer networks or used in parallel for additional input or output nodes. The device computes 1.92 x 10