Jeff: Yung-Choa Pan and Jay M. Tenenbaum

Introduction This report summarizes our experience in building PIES, a knowledge-based system that diagnoses problems in semiconductor fabrication processes by analyzing parametric test data. Parametric measurement, which is performed on test circuits at the end of a complicated semiconductor fabrication process, provides semiconductor engineers with early information to monitor the "health' ' of the overall fabrication process. Typically, hundreds of measurements are made on each wafer. The problem is to reduce the resulting ream of data to a concise summary of the process status: whether the process is functioning correctly and, if not, what the nature and cause of the abnormality is. Currently, this interpretation taskis performed by a group of semiconductor specialists known as failure-analysis or yield-enhancement engineers and routinely consumes a large portion of their time. It is critical that problems be identified quickly to avoid a major operational loss.