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 cerebellar model


The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning

Neural Information Processing Systems

We present a biophysically constrained cerebellar model of classical conditioning, implemented using a neuromorphic analog VLSI (aVLSI) chip. Like its biological counterpart, our cerebellar model is able to control adaptive behavior by predicting the precise timing of events. Here we describe the functionality of the chip and present its learning performance, as evaluated in simulated conditioning experiments at the circuit level and in behavioral experiments using a mobile robot. We show that this aVLSI model supports the acquisition and extinction of adaptively timed conditioned responses under real-world conditions with ultra-low power consumption.


Artificial cerebellum than enables robotic human-like object handling developed

AITopics Original Links

To date, although robot designers have achieved very precise movements, such movements are performed at very high speed, require strong forces and are power consuming. This approach cannot be applied to robots that interact with humans, as a malfunction might be potentially dangerous. To solve this challenge, University of Granada researchers have implemented a new cerebellar spiking model that adapts to corrections and stores their sensorial effects; in addition, it records motor commands to predict the action or movement to be performed by the robotic arm. This cerebellar model allows the user to articulate a state-of-the-art robotic arm with extraordinary mobility. The developers of the new cerebellar model have obtained a robot that performs automatic learning by extracting the input layer functionalities of the brain cortex.


The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning

Hofstoetter, Constanze, Gil, Manuel, Eng, Kynan, Indiveri, Giacomo, Mintz, Matti, Kramer, Jörg, Verschure, Paul F.

Neural Information Processing Systems

We present a biophysically constrained cerebellar model of classical conditioning, implemented using a neuromorphic analog VLSI (aVLSI) chip. Like its biological counterpart, our cerebellar model is able to control adaptive behavior by predicting the precise timing of events. Here we describe the functionality of the chip and present its learning performance, as evaluated in simulated conditioning experiments at the circuit level and in behavioral experiments using a mobile robot. We show that this aVLSI model supports the acquisition and extinction of adaptively timed conditioned responses under real-world conditions with ultra-low power consumption.


The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning

Hofstoetter, Constanze, Gil, Manuel, Eng, Kynan, Indiveri, Giacomo, Mintz, Matti, Kramer, Jörg, Verschure, Paul F.

Neural Information Processing Systems

We present a biophysically constrained cerebellar model of classical conditioning, implemented using a neuromorphic analog VLSI (aVLSI) chip. Like its biological counterpart, our cerebellar model is able to control adaptive behavior by predicting the precise timing of events. Here we describe the functionality of the chip and present its learning performance, as evaluated in simulated conditioning experiments at the circuit level and in behavioral experiments using a mobile robot. We show that this aVLSI model supports the acquisition and extinction of adaptively timed conditioned responses under real-world conditions with ultra-low power consumption.


The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning

Hofstoetter, Constanze, Gil, Manuel, Eng, Kynan, Indiveri, Giacomo, Mintz, Matti, Kramer, Jörg, Verschure, Paul F.

Neural Information Processing Systems

We present a biophysically constrained cerebellar model of classical conditioning, implemented using a neuromorphic analog VLSI (aVLSI) chip. Like its biological counterpart, our cerebellar model is able to control adaptive behavior by predicting the precise timing of events. Here we describe the functionality of the chip and present its learning performance, as evaluated in simulated conditioning experiments at the circuit level and in behavioral experiments using a mobile robot. We show that this aVLSI model supports the acquisition and extinction of adaptively timed conditioned responses under real-world conditions with ultra-low power consumption.