Technology
Two-Dimensional Object Localization by Coarse-to-Fine Correlation Matching
Lu, Chien-Ping, Mjolsness, Eric
Chien-Ping Lu and Eric Mjolsness Department of Computer Science Yale University New Haven, CT 06520-8285 Abstract We present a Mean Field Theory method for locating twodimensional objectsthat have undergone rigid transformations. The resulting algorithm is a form of coarse-to-fine correlation matching. We first consider problems of matching synthetic point data, and derive a point matching objective function. A tractable line segment matching objective function is derived by considering each line segment as a dense collection of points, and approximating itby a sum of Gaussians. The algorithm is tested on real images from which line segments are extracted and matched. 1 Introduction Assume that an object in a scene can be viewed as an instance of the model placed in space by some spatial transformation, and object recognition is achieved by discovering aninstance of the model in the scene.
Feature Densities are Required for Computing Feature Correspondences
The feature correspondence problem is a classic hurdle in visual object-recognition concerned with determining the correct mapping between the features measured from the image and the features expected bythe model. In this paper we show that determining good correspondences requires information about the joint probability density over the image features. We propose "likelihood based correspondence matching" as a general principle for selecting optimal correspondences.The approach is applicable to nonrigid models, allows nonlinear perspective transformations, and can optimally dealwith occlusions and missing features.
Classifying Hand Gestures with a View-Based Distributed Representation
Darrell, Trevor J., Pentland, Alex P.
We present a method for learning, tracking, and recognizing human hand gestures recorded by a conventional CCD camera without any special gloves or other sensors. A view-based representation is used to model aspects of the hand relevant to the trained gestures, and is found using an unsupervised clustering technique. We use normalized correlation networks, withdynamic time warping in the temporal domain, as a distance function for unsupervised clustering. Views are computed separably for space and time dimensions; the distributed response of the combination of these units characterizes the input data with a low dimensional representation. Asupervised classification stage uses labeled outputs of the spatiotemporal units as training data. Our system can correctly classify gestures in real time with a low-cost image processing accelerator.
Globally Trained Handwritten Word Recognizer using Spatial Representation, Convolutional Neural Networks, and Hidden Markov Models
Bengio, Yoshua, LeCun, Yann, Henderson, Donnie
We introduce a new approach for online recognition of handwritten wordswritten in unconstrained mixed style. The preprocessor performs a word-level normalization by fitting a model of the word structure using the EM algorithm. Words are then coded into low resolution "annotated images" where each pixel contains information abouttrajectory direction and curvature. The recognizer is a convolution network which can be spatially replicated. From the network output, a hidden Markov model produces word scores.
Learning Complex Boolean Functions: Algorithms and Applications
Oliveira, Arlindo L., Sangiovanni-Vincentelli, Alberto
The most commonly used neural network models are not well suited to direct digital implementations because each node needs to perform alarge number of operations between floating point values. Fortunately, the ability to learn from examples and to generalize is not restricted to networks ofthis type. Indeed, networks where each node implements a simple Boolean function (Boolean networks) can be designed in such a way as to exhibit similar properties. Two algorithms that generate Boolean networks from examples are presented. Theresults show that these algorithms generalize very well in a class of problems that accept compact Boolean network descriptions.
Efficient Simulation of Biological Neural Networks on Massively Parallel Supercomputers with Hypercube Architecture
We present a neural network simulation which we implemented on the massively parallel Connection Machine 2. In contrast to previous work, this simulator is based on biologically realistic neurons withnontrivial single-cell dynamics, high connectivity with a structure modelled in agreement with biological data, and preservation ofthe temporal dynamics of spike interactions. We simulate neural networks of 16,384 neurons coupled by about 1000 synapses per neuron, and estimate the performance for much larger systems. Communication between neurons is identified as the computationally mostdemanding task and we present a novel method to overcome thisbottleneck. The simulator has already been used to study the primary visual system of the cat. 1 INTRODUCTION Neural networks have been implemented previously on massively parallel supercomputers (Fujimotoet al., 1992, Zhang et al., 1990). However, these are implementations ofartificial, highly simplified neural networks, while our aim was explicitly to provide a simulator for biologically realistic neural networks. There is also at least one implementation of biologically realistic neuronal systems on a moderately 904 Efficient Simulation of Biological Neural Networks 905 parallel but powerful machine (De Schutter and Bower, 1992), but the complexity of the used neuron model makes simulation of larger numbers of neurons impractical. Ourinterest here is to provide an efficient simulator of large neural networks of cortex and related subcortical structures. The most important characteristics of the neuronal systems we want to simulate are the following: - Cells are highly interconnected (several thousand connections per cell) but far from fully interconnected.
Digital Boltzmann VLSI for constraint satisfaction and learning
Murray, Michael, Leung, Ming-Tak, Boonyanit, Kan, Kritayakirana, Kong, Burg, James B., Wolff, Gregory J., Watanabe, Tokahiro, Schwartz, Edward, Stork, David G., Peterson, Allen M.
We built a high-speed, digital mean-field Boltzmann chip and SBus board for general problems in constraint satjsfaction and learning. Each chip has 32 neural processors and 4 weight update processors, supporting an arbitrary topology of up to 160 functional neurons. On-chip learning is at a theoretical maximum rate of 3.5 x 108 connection updates/sec;recall is 12000 patterns/sec for typical conditions. The chip's high speed is due to parallel computation of inner products, limited (but adequate) precision for weights and activations (5bits), fast clock (125 MHz), and several design insights.
A Learning Analog Neural Network Chip with Continuous-Time Recurrent Dynamics
The recurrent network,containing six continuous-time analog neurons and 42 free parameters (connection strengths and thresholds), is trained to generate time-varying outputs approximating given periodic signals presented to the network. The chip implements a stochastic perturbative algorithm,which observes the error gradient along random directions in the parameter space for error-descent learning. In addition tothe integrated learning functions and the generation of pseudo-random perturbations, the chip provides for teacher forcing andlong-term storage of the volatile parameters. The network learns a 1 kHz circular trajectory in 100 sec. The chip occupies 2mm x 2mm in a 2JLm CMOS process, and dissipates 1.2 mW. 1 Introduction Exact gradient-descent algorithms for supervised learning in dynamic recurrent networks [1-3]are fairly complex and do not provide for a scalable implementation in a standard 2-D VLSI process. We have implemented a fairly simple and scalable ·Present address: Johns Hopkins University, ECE Dept., Baltimore MD 21218-2686.
A Hybrid Radial Basis Function Neurocomputer and Its Applications
Watkins, Steven S., Chau, Paul M., Tawel, Raoul, Lambrigtsen, Bjorn, Plutowski, Mark
A neurocomputer was implemented using radial basis functions and a combination of analog and digital VLSI circuits. The hybrid system uses custom analog circuits for the input layer and a digital signal processing board for the hidden and output layers. The system combines the advantages of both analog and digital circuits.