I view the World Wide Web as an information food chain. The maze of pages and hyperlinks that comprise the Web are at the very bottom of the chain. The WEBCRAWLERs and ALTAVISTAs of the world are information herbivores; they graze on Web pages and regurgitate them as searchable indices. Today, most Web users feed near the bottom of the information food chain, but the time is ripe to move up. Since 1991, we have been building information carnivores, which intelligently hunt and feast on herbivores in UNIX, on the Internet, and on the Web. Information carnivores will become increasingly critical as the Web continues to grow and as more naive users are exposed to its chaotic jumble.

The Association for the Advancement of Artificial Intelligence (AAAI) held its 1996 Fall Symposia Series on 9 to 11 November in Cambridge, Massachusetts. This article contains summaries of the seven symposia that were conducted: (1) Configuration; (2) Developing Assistive Technology for People with Disabilities; (3) Embodied Cognition and Action; (4) Flexible Computation: Results, Issues, and Opportunities; (5) Knowledge Representation Systems Based on Natural Language; (6) Learning Complex Behaviors in Adaptive Intelligent Systems; and (7) Plan Execution: Problems and Issues.

The next portion of the workshop was devoted to different approaches to preventing and repairing miscommunication. These sessions represent a progression between different parts of their discourse Research related to achieving from work that clarifies the model or between the discourse robust interaction is an important problem of miscommunication to model and the domain model. Early work concerned work that describes the strategies The last session was the presentation the correction of spelling or grammatical used to repair miscommunication. I of work involving deployed systems errors in a user's utterance so review the most significant issues using speech as a mode of interaction. The approaches were constrained by their have assumed that the system's model differed in two dimensions: First, experimenters impact on overall system performance is always correct.

The Association for the Advancement of Artificial Intelligence (AAAI) held its 1996 Fall Symposia Series on 9 to 11 November in Cambridge, Massachusetts. This article contains summaries of the seven symposia that were conducted: (1) Configuration; (2) Developing Assistive Technology for People with Disabilities; (3) Embodied Cognition and Action; (4) Flexible Computation: Results, Issues, and Opportunities; (5) Knowledge Representation Systems Based on Natural Language; (6) Learning Complex Behaviors in Adaptive Intelligent Systems; and (7) Plan Execution: Problems and Issues.

This article was reprinted with permission from "ACM Computing Surveys: 28(4): December 1996, 653-670. original is available from ACM.

We are developing special-purpose, low-power analog-to-digital converters for speech and music applications, that feature analog circuit models of biological audition to process the audio signal before conversion. This paper describes our most recent converter design, and a working system that uses several copies ofthe chip to compute multiple representations of sound from an analog input. This multi-representation system demonstrates the plausibility of inexpensively implementing an auditory scene analysis approach to sound processing. 1. INTRODUCTION The visual system computes multiple representations of the retinal image, such as motion, orientation, and stereopsis, as an early step in scene analysis. Likewise, the auditory brainstem computes secondary representations of sound, emphasizing properties such as binaural disparity, periodicity, and temporal onsets. Recent research in auditory scene analysis involves using computational models of these auditory brainstem representations in engineering applications. Computation is a major limitation in auditory scene analysis research: the complete auditory processing system described in (Brown and Cooke, 1994) operates at approximately 4000 times real time, running under UNIX on a Sun SPARCstation 1. Standard approaches to hardware acceleration for signal processing algorithms could be used to ease this computational burden in a research environment; a variety of parallel, fixed-point hardware products would work well on these algorithms.

Selective suppression of transmission at feedback synapses during learning is proposed as a mechanism for combining associative feedback with self-organization of feed forward synapses. Experimental data demonstrates cholinergic suppression of synaptic transmission in layer I (feedback synapses), and a lack of suppression in layer IV (feedforward synapses). A network with this feature uses local rules to learn mappings which are not linearly separable. During learning, sensory stimuli and desired response are simultaneously presented as input. Feedforward connections form self-organized representations of input, while suppressed feedback connections learn the transpose of feedforward connectivity. During recall, suppression is removed, sensory input activates the self-organized representation, and activity generates the learned response.

Selective suppression of transmission at feedback synapses during learning is proposed as a mechanism for combining associative feedback with self-organization of feed forward synapses. Experimental data demonstrates cholinergic suppression of synaptic transmission in layer I (feedback synapses), and a lack of suppression in layer IV (feedforward synapses). A network with this feature uses local rules to learn mappings which are not linearly separable. During learning, sensory stimuli and desired response are simultaneously presented as input. Feedforward connections form self-organized representations of input, while suppressed feedback connections learn the transpose of feedforward connectivity. During recall, suppression is removed, sensory input activates the self-organized representation, and activity generates the learned response.

Selective suppression of transmission at feedback synapses during learning is proposed as a mechanism for combining associative feedback withself-organization of feedforward synapses. Experimental data demonstrates cholinergic suppression of synaptic transmission in layer I (feedback synapses), and a lack of suppression in layer IV (feedforward synapses).A network with this feature uses local rules to learn mappings which are not linearly separable. During learning, sensory stimuli and desired response are simultaneously presented as input. Feedforward connections form self-organized representations of input, while suppressed feedback connections learn the transpose of feedforward connectivity.During recall, suppression is removed, sensory input activates the self-organized representation, and activity generates the learned response.

We are developing special-purpose, low-power analog-to-digital converters for speech and music applications, that feature analog circuit models of biological audition to process the audio signal before conversion. This paper describes our most recent converter design, and a working system that uses several copies ofthe chip to compute multiple representations of sound from an analog input. This multi-representation system demonstrates the plausibility of inexpensively implementing an auditory scene analysis approach to sound processing. 1. INTRODUCTION The visual system computes multiple representations of the retinal image, such as motion, orientation, and stereopsis, as an early step in scene analysis. Likewise, the auditory brainstem computes secondary representations of sound, emphasizing properties such as binaural disparity, periodicity, and temporal onsets. Recent research in auditory scene analysis involves using computational models of these auditory brainstem representations in engineering applications. Computation is a major limitation in auditory scene analysis research: the complete auditoryprocessing system described in (Brown and Cooke, 1994) operates at approximately 4000 times real time, running under UNIX on a Sun SPARCstation 1. Standard approaches to hardware acceleration for signal processing algorithms could be used to ease this computational burden in a research environment; a variety of parallel, fixed-point hardware products would work well on these algorithms.