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RISC-V, the Linux of the chip world, is starting to produce technological breakthroughs

ZDNet

"The potential was always there" for innovation in chip design, said Dr. David Patterson, co-creator of the open standard chip instructions known as RISC-V. "Maybe because of all the competition, we are starting to see some really interesting points in the design space being realized." A decade ago, an idea was born in a laboratory at the University of California at Berkeley to create a lingua franca for computer chips, a set of instructions that would be used by all chipmakers and owned by none. It wasn't supposed to be an impressive new technology, it was merely supposed to get the industry on the same page, to simplify chip-making in order to move things forward. But a funny thing has happened on the way to a global chip standard: RISC-V, as the Berkeley effort is known, has begun to produce some technical breakthroughs in chip design. As just one example, a recent microprocessor design using RISC-V has a clock speed of 5 gigahertz, well above a recent, top-of-the-line Intel Xeon server chip, E7, running at 3.2 gigahertz.


Intel's tilt to foundry opens a door to upstart RISC-V technology

ZDNet

Recently appointed Intel CEO Pat Gelsinger Tuesday said he will lead the company to being a "world-class foundry" to make chips for other companies, incuding Intel's competitors. That vow could open the door to a newer technology that could even displace some Intel products, the open-source RISC-V chip standard developed at the University of California at Berkeley. SiFive, a chip startup that has for several years been developing intellectual property using RISC-V, announced in conjunction with Gelsinger's talk that it is working with Intel to make the RISC-V designs availabe to customers of Intel's Foundry Services Business. "I am excited to see Intel's new Foundry services business (IFS) in the U.S. and Europe increase the opportunity and choice for the semiconductor industry," wrote SiFive CEO Patrick Little in a blog post. "We're pleased to see Intel recognize the utility and opportunity for the RISC-V instruction set architecture in partnering to enable SiFive's industry-leading Core IP portfolio to enable a new wave of leading-edge technology."


RISC-V Gains Its Footing

#artificialintelligence

The RISC-V instruction-set architecture, which started as a UC Berkeley project to improve energy efficiency, is gaining steam across the industry.


RISC-V opens up processor design

ZDNet

Today, if you want to build a high-performance computing device, you can almost certainly find all the software you need in a free and open form. The same is not true for the processor chips that run that free software -- whatever you choose, a chunk of what you pay will go on proprietary hardware licences to Intel, ARM, or their friends. RISC-V, pronounced'Risk-Five', is a new architecture that's available under open, free and non-restrictive licences. It has widespread industry support from chip and device makers, and is designed to be freely extensible and customisable to fit any market niche. To be a success, however, it has to perform technically as well as be economic to design for, verify and program.


Open source advances deeper into hardware: The CHIPS Alliance project

ZDNet

Open-source hardware is older than you might think. Sun released OpenSPARC in 2007, and IBM started OpenPOWER in 2013. OpenSPARC would die after Oracle bought Sun, and OpenPOWER remains largely IBM-driven. With the recent arrival of the RISC-V (pronounced Risk-Five), though, open-source CPU designs have finally caught fire. Now, the Linux Foundation is helping form the CHIPS Alliance project.