Collaborating Authors

Linux Foundation and RISC-V International launch free RISC-V training classes


RISC-V, the emerging open-source instruction set processor architecture, is growing up. Sure, most of the attention has come from hardware hackers playing on RISC-V processors on development boards from companies such as SiFive. But, according to RISC-V CTO Mark Himelstein, RISC-V processors have already found a home in data centers and Alibaba cloud servers. So, it's high time for classes on how to use this new open-source hardware architecture. Then you need to know Linux and open-source software.

Open-source chip mimics Linux's path to take on closed x86 and ARM CPUs


If you're buying a PC or server, you've likely considered chips based on x86 or, perhaps less often, the ARM architecture. But like Linux in software, an open-source chip project is out to break the dominance of proprietary chips offered by Intel, AMD, and ARM. The RISC-V open-source architecture, created by researchers at the University of California, Berkeley, in 2010, is open to all who want to use it. The RISC-V design can be modified for PCs, servers, smartphones, wearables, and other devices. A startup called SiFive is the first to make a business out of the RISC-V architecture.

RISC-V International Ratifies 15 New Specifications, Opening Up New Possibilities for RISC-V Designs - RISC-V International


ZURICH – Dec. 2, 2021 – RISC-V International, a global open hardware standards organization, today announced that RISC-V members have ratified 15 new specifications – representing more than 40 extensions – for the free and open RISC-V instruction set architecture (ISA). Most notably, RISC-V members ratified the Vector, Scalar Cryptography, and Hypervisor specifications which will help unlock new opportunities for developers creating RISC-V applications for artificial intelligence (AI) and machine learning (ML), the Internet of Things (IoT), connected and autonomous cars, data centers, and beyond. "In 2021, RISC-V International made huge leaps in our technical progress as we ratified 15 specifications that are critical for the future of computing," said Krste Asanović, Chair of the RISC-V International Board of Directors. "The development of these specifications really showcased the incredible benefits of open collaboration across companies and geographies as members worked together to develop novel approaches for the latest computing requirements." The RISC-V Vector specification will help accelerate the computation of data intensive operations like ML inference for audio, vision, and voice processing.

RISC-V Gains Its Footing


The RISC-V instruction-set architecture, which started as a UC Berkeley project to improve energy efficiency, is gaining steam across the industry.

Intel invests in open-source RISC-V processors, creates billion-dollar fund


RISC-V International, the global open hardware standards organization, has announced that Intel has joined RISC-V at the Premier membership level. Let that sink in for a minute. Intel, which has made billions from its closed-source, complex instruction set computer (CISC) x86 processors, is joining forces with RISC-V, the open-source reduced instruction set computer (RISC) CPU group. Dr. David Patterson, co-creator of RISC-V, helped make it an open lingua franca for computer chips, a set of instructions that would be used by all chipmakers and owned by none. Today, Patterson said, "I'm delighted that Intel, the company that pioneered the microprocessor 50 years ago, is now a member of RISC-V International."