RISC-V, the emerging open-source instruction set processor architecture, is growing up. Sure, most of the attention has come from hardware hackers playing on RISC-V processors on development boards from companies such as SiFive. But, according to RISC-V CTO Mark Himelstein, RISC-V processors have already found a home in data centers and Alibaba cloud servers. So, it's high time for classes on how to use this new open-source hardware architecture. Then you need to know Linux and open-source software.
ZURICH – Dec. 2, 2021 – RISC-V International, a global open hardware standards organization, today announced that RISC-V members have ratified 15 new specifications – representing more than 40 extensions – for the free and open RISC-V instruction set architecture (ISA). Most notably, RISC-V members ratified the Vector, Scalar Cryptography, and Hypervisor specifications which will help unlock new opportunities for developers creating RISC-V applications for artificial intelligence (AI) and machine learning (ML), the Internet of Things (IoT), connected and autonomous cars, data centers, and beyond. "In 2021, RISC-V International made huge leaps in our technical progress as we ratified 15 specifications that are critical for the future of computing," said Krste Asanović, Chair of the RISC-V International Board of Directors. "The development of these specifications really showcased the incredible benefits of open collaboration across companies and geographies as members worked together to develop novel approaches for the latest computing requirements." The RISC-V Vector specification will help accelerate the computation of data intensive operations like ML inference for audio, vision, and voice processing.
RISC-V International, the global open hardware standards organization, has announced that Intel has joined RISC-V at the Premier membership level. Let that sink in for a minute. Intel, which has made billions from its closed-source, complex instruction set computer (CISC) x86 processors, is joining forces with RISC-V, the open-source reduced instruction set computer (RISC) CPU group. Dr. David Patterson, co-creator of RISC-V, helped make it an open lingua franca for computer chips, a set of instructions that would be used by all chipmakers and owned by none. Today, Patterson said, "I'm delighted that Intel, the company that pioneered the microprocessor 50 years ago, is now a member of RISC-V International."
Calista Redmond, chief executive of the microprocessor consortium RISC-V International, is a fan of the wild days of chip competition back in the 1980s. "This is the biggest opportunity to change the trajectory of computing and hardware that history has seen since the 80s, and that gets me excited every day," said Redmond in a recent interview with ZDNet via Zoom. She was referring to the flowering in the '80s of numerous different computer chip architectures. They included not only Intel's x86 processors, but IBM's POWER architecture; MIPS-based processors made by companies such as NEC and Toshiba; Digital Equipment Corp.'s Alpha series of processors; Sun's Sparc processors; Motorola's PowerPC series; and Hewlett-Packard's PA-RISC series, to name just some of the more obvious chips. Many of these processor families faded over the decades, leaving two main processor camps, x86, and the ARM processors made by the U.K. firm of that name, which is owned by Japan's Softbank Group, and which is being sold to Nvidia.